JPH0418701B2 - - Google Patents
Info
- Publication number
- JPH0418701B2 JPH0418701B2 JP60123002A JP12300285A JPH0418701B2 JP H0418701 B2 JPH0418701 B2 JP H0418701B2 JP 60123002 A JP60123002 A JP 60123002A JP 12300285 A JP12300285 A JP 12300285A JP H0418701 B2 JPH0418701 B2 JP H0418701B2
- Authority
- JP
- Japan
- Prior art keywords
- layer wiring
- forming
- insulating film
- film
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 239000004065 semiconductor Substances 0.000 claims description 31
- 238000000034 method Methods 0.000 claims description 27
- 238000004519 manufacturing process Methods 0.000 claims description 16
- 230000000694 effects Effects 0.000 claims description 13
- 239000000758 substrate Substances 0.000 claims description 8
- 238000010438 heat treatment Methods 0.000 claims description 7
- 239000000463 material Substances 0.000 claims description 6
- 229910000838 Al alloy Inorganic materials 0.000 claims description 3
- 239000011248 coating agent Substances 0.000 claims description 3
- 238000000576 coating method Methods 0.000 claims description 3
- 239000002184 metal Substances 0.000 claims description 2
- 150000002736 metal compounds Chemical class 0.000 claims description 2
- 239000010408 film Substances 0.000 claims 10
- 239000010409 thin film Substances 0.000 claims 3
- 150000001875 compounds Chemical class 0.000 claims 1
- 229910044991 metal oxide Inorganic materials 0.000 claims 1
- 150000004706 metal oxides Chemical class 0.000 claims 1
- 150000004767 nitrides Chemical class 0.000 claims 1
- 239000010410 layer Substances 0.000 description 47
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 39
- 239000000377 silicon dioxide Substances 0.000 description 18
- 229910018125 Al-Si Inorganic materials 0.000 description 10
- 229910018520 Al—Si Inorganic materials 0.000 description 10
- 238000005530 etching Methods 0.000 description 10
- 238000001020 plasma etching Methods 0.000 description 10
- 229910008484 TiSi Inorganic materials 0.000 description 8
- 239000011229 interlayer Substances 0.000 description 8
- 238000000206 photolithography Methods 0.000 description 5
- 229920001721 polyimide Polymers 0.000 description 5
- 229910052814 silicon oxide Inorganic materials 0.000 description 3
- 238000004544 sputter deposition Methods 0.000 description 3
- 238000000151 deposition Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 235000002918 Fraxinus excelsior Nutrition 0.000 description 1
- 239000002956 ash Substances 0.000 description 1
- 238000004380 ashing Methods 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 230000002401 inhibitory effect Effects 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000001459 lithography Methods 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 238000013508 migration Methods 0.000 description 1
- 230000005012 migration Effects 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- 238000005268 plasma chemical vapour deposition Methods 0.000 description 1
- 230000002265 prevention Effects 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 238000005245 sintering Methods 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76885—By forming conductive members before deposition of protective insulating material, e.g. pillars, studs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76822—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
- H01L21/76828—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc. thermal treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/7685—Barrier, adhesion or liner layers the layer covering a conductive structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/937—Hillock prevention
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Priority Applications (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60123002A JPS61280638A (ja) | 1985-06-06 | 1985-06-06 | 半導体装置の製造方法 |
| US06/870,117 US4728627A (en) | 1985-06-06 | 1986-06-03 | Method of making multilayered interconnects using hillock studs formed by sintering |
| KR1019860004508A KR900001834B1 (ko) | 1985-06-06 | 1986-06-05 | 반도체장치의 제조방법 |
| DE8686107736T DE3684844D1 (de) | 1985-06-06 | 1986-06-06 | Verfahren zur herstellung einer halbleiteranordnung mittels der herstellung einer vielschichtigen verbindungsstruktur. |
| EP86107736A EP0216017B1 (en) | 1985-06-06 | 1986-06-06 | Method of manufacturing a semiconductor device including forming a multi-level interconnection layer |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60123002A JPS61280638A (ja) | 1985-06-06 | 1985-06-06 | 半導体装置の製造方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS61280638A JPS61280638A (ja) | 1986-12-11 |
| JPH0418701B2 true JPH0418701B2 (en]) | 1992-03-27 |
Family
ID=14849830
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP60123002A Granted JPS61280638A (ja) | 1985-06-06 | 1985-06-06 | 半導体装置の製造方法 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US4728627A (en]) |
| EP (1) | EP0216017B1 (en]) |
| JP (1) | JPS61280638A (en]) |
| KR (1) | KR900001834B1 (en]) |
| DE (1) | DE3684844D1 (en]) |
Families Citing this family (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62194644A (ja) * | 1986-02-20 | 1987-08-27 | Mitsubishi Electric Corp | 半導体装置およびその製造方法 |
| US4970573A (en) * | 1986-07-01 | 1990-11-13 | Harris Corporation | Self-planarized gold interconnect layer |
| TW214599B (en]) * | 1990-10-15 | 1993-10-11 | Seiko Epson Corp | |
| NL9100094A (nl) * | 1991-01-21 | 1992-08-17 | Koninkl Philips Electronics Nv | Halfgeleiderinrichting en werkwijze ter vervaardiging van een dergelijke halfgeleiderinrichting. |
| JPH05267471A (ja) * | 1991-04-05 | 1993-10-15 | Matsushita Electric Ind Co Ltd | 半導体装置の製造方法 |
| JPH0555223A (ja) * | 1991-08-27 | 1993-03-05 | Nippon Precision Circuits Kk | 集積回路装置の製造方法 |
| KR950006343B1 (ko) * | 1992-05-16 | 1995-06-14 | 금성일렉트론주식회사 | 반도체 장치의 제조방법 |
| US5937327A (en) * | 1993-04-23 | 1999-08-10 | Ricoh Company, Ltd. | Method for improving wiring contact in semiconductor devices |
| USRE36475E (en) * | 1993-09-15 | 1999-12-28 | Hyundai Electronics Industries Co., Ltd. | Method of forming a via plug in a semiconductor device |
| KR0140646B1 (ko) * | 1994-01-12 | 1998-07-15 | 문정환 | 반도체장치의 제조방법 |
| JPH08130246A (ja) * | 1994-10-28 | 1996-05-21 | Ricoh Co Ltd | 半導体装置とその製造方法 |
| US5726498A (en) * | 1995-05-26 | 1998-03-10 | International Business Machines Corporation | Wire shape conferring reduced crosstalk and formation methods |
| KR100252309B1 (ko) * | 1997-03-03 | 2000-04-15 | 구본준, 론 위라하디락사 | 박막 트랜지스터 어레이의 금속 배선 연결 방법및 그 구조 |
| US6594894B1 (en) * | 1997-09-30 | 2003-07-22 | The United States Of America As Represented By The Secretary Of The Air Force | Planar-processing compatible metallic micro-extrusion process |
| AU2002313208B2 (en) * | 2001-06-18 | 2007-07-26 | Cosmo Oil Co., Ltd. | Method for producing hydrocarbons by fischer-tropsch process |
| JP6298312B2 (ja) * | 2014-02-13 | 2018-03-20 | エイブリック株式会社 | 半導体装置の製造方法 |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE3132809A1 (de) * | 1981-08-19 | 1983-03-10 | Siemens AG, 1000 Berlin und 8000 München | Verfahren zum herstellen von integrierten mos-feldeffekttransistoren, insbesondere von komplementaeren mos-feldeffekttransistorenschaltungen mit einer aus metallsiliziden bestehenden zusaetzlichen leiterbahnebene |
-
1985
- 1985-06-06 JP JP60123002A patent/JPS61280638A/ja active Granted
-
1986
- 1986-06-03 US US06/870,117 patent/US4728627A/en not_active Expired - Lifetime
- 1986-06-05 KR KR1019860004508A patent/KR900001834B1/ko not_active Expired
- 1986-06-06 EP EP86107736A patent/EP0216017B1/en not_active Expired - Lifetime
- 1986-06-06 DE DE8686107736T patent/DE3684844D1/de not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| US4728627A (en) | 1988-03-01 |
| EP0216017A3 (en) | 1988-09-21 |
| KR900001834B1 (ko) | 1990-03-24 |
| KR870000758A (ko) | 1987-02-20 |
| EP0216017A2 (en) | 1987-04-01 |
| EP0216017B1 (en) | 1992-04-15 |
| JPS61280638A (ja) | 1986-12-11 |
| DE3684844D1 (de) | 1992-05-21 |
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